Product Datasheet Search Results:
118 Pages, 632 KB, Original- EP20K100EFC144-1
- Altera Corporation
- FPGA - Field Programmable Gate Array CPLD - APEX 20K 416 Macro 93 IOs
132 Pages, 1047 KB, Original- EP20K100EFC144-1N
- Altera Corporation
- LOADABLE PLD, 1.73 ns, PBGA144
118 Pages, 632 KB, Original- EP20K100EFC144-1X
- Altera Corporation
- FPGA - Field Programmable Gate Array CPLD - APEX 20K 416 Macro 93 IOs
132 Pages, 1047 KB, Original- EP20K100EFC144-1XN
- Altera Corporation
- LOADABLE PLD, 1.73 ns, PBGA144
Product Details Search Results:
Altera.com/EP20K100EFC144-1
{"Category":"Integrated Circuits (ICs)","Number of LABs/CLBs":"416","Product Photos":"DS-144FBGA05-2_0","Family":"Embedded - FPGAs (Field Programmable Gate Array)","Number of Logic Elements/Cells":"4160","Series":"APEX-20KE\u00ae","Standard Package":"160","Number of I/O":"93","Supplier Device Package":"144-FBGA (13x13)","Datasheets":"APEX 20K Device Family Data Sheet 144-FBGA Pkg Info Virtual JTAG Megafuntion User Guide","Total RAM Bits":"53248","Number of Gates":"263000","Operating Temperature":"0\u00b0C ~...
2003 Bytes - 11:40:55, 17 November 2024
Altera.com/EP20K100EFC144-1N
{"Terminal Finish":"TIN SILVER COPPER","Terminal Pitch":"1 mm","Clock Freq-Max (fclk)":"160 MHz","Programmable Logic Type":"LOADABLE PLD","Terminal Form":"BALL","Operating Temperature-Max":"85 Cel","Output Function":"MACROCELL","Supply Voltage-Nom (Vsup)":"1.8 V","Temperature Grade":"OTHER","Package Shape":"SQUARE","Status":"ACTIVE","Lead Free":"Yes","Operating Temperature-Min":"0.0 Cel","Package Body Material":"PLASTIC/EPOXY","Propagation Delay (tpd)":"1.73 ns","Number of Functions":"1","EU RoHS Compliant"...
1642 Bytes - 11:40:55, 17 November 2024
Altera.com/EP20K100EFC144-1X
{"Category":"Integrated Circuits (ICs)","Number of LABs/CLBs":"416","Product Photos":"DS-144FBGA05-2_0","Family":"Embedded - FPGAs (Field Programmable Gate Array)","Number of Logic Elements/Cells":"4160","Series":"APEX-20KE\u00ae","Standard Package":"160","Number of I/O":"93","Supplier Device Package":"144-FBGA (13x13)","Datasheets":"APEX 20K Device Family Data Sheet 144-FBGA Pkg Info Virtual JTAG Megafuntion User Guide","Total RAM Bits":"53248","Number of Gates":"263000","Operating Temperature":"0\u00b0C ~...
2011 Bytes - 11:40:55, 17 November 2024
Altera.com/EP20K100EFC144-1XN
{"Terminal Finish":"TIN SILVER COPPER","Terminal Pitch":"1 mm","Clock Freq-Max (fclk)":"160 MHz","Programmable Logic Type":"LOADABLE PLD","Terminal Form":"BALL","Operating Temperature-Max":"85 Cel","Output Function":"MACROCELL","Supply Voltage-Nom (Vsup)":"1.8 V","Temperature Grade":"OTHER","Package Shape":"SQUARE","Status":"ACTIVE","Lead Free":"Yes","Operating Temperature-Min":"0.0 Cel","Package Body Material":"PLASTIC/EPOXY","Propagation Delay (tpd)":"1.73 ns","Number of Functions":"1","EU RoHS Compliant"...
1648 Bytes - 11:40:55, 17 November 2024
Documentation and Support
Use our online request for specific proposed solutions or send your technical question directly to a product specialist at request:
| File Name | File Size (MB) | Document | MOQ | Support |
|---|---|---|---|---|
| EP20K100EFC144-1.pdf | 0.70 | 1 | Request | |
| EP20K100EFC144-1X.pdf | 0.70 | 1 | Request | |
| EP20K100EFC144-1N.pdf | 0.70 | 1 | Request | |
| EP20K100EFC144-1XN.pdf | 0.70 | 1 | Request |
