TMP8255AP-5 1. GENERAL DESCRIPTION AND FEATURES The TMP8255A (hereinafter referred to as PPI) is a high Speed programmable input/output interface with three 8-bit I/O ports. 24 I/O ports are divided into two groups (Port A and Port B) which are programmable independently by control words provided by MPU. The PPI has three operation modes (Mode 0, 1 and 2) and is capable of versatile interface between MPU and peripheral devices. (1) 5V+5% Single power supply (2) 24 programmable I/O ports (3) Three operation modes (Mode 0, Mode 1, Mode 2) (4) Bit set/reset capability 2. PIN CONNECTIONS (TOP VIEW) PA3()1 40 beag PA2Q 2 39 DPAs PA, Q3 38 1 PAg PAod 4 37 [| PA? RDQ5 36 DWR cs6 35 D RESET (GND) Vss 07 34 DDo Ai G8 33 1D; Aod9 32 D2 Pc7 10 31 0D3 PC 11 30 1 Da PCsQ 12 29 0Ds PCq4 J 13 28 1D5 PCof] 14 27 107 PC19 15 26 1 Vcc (+ 5V) PC2 1] 16 25 1 PB7 PC3) 17 24 1) PBg PBo fl 18 23 D PBs PB, 0) 19 22 1 PB, PB2] 20 21 1 PB3 TMP8255AP-5 050489 MPU85-153TOSHIBA TMP8255A 3. BLOCK DIAGRAM D7~Do BI
TMP8255AP-5 1. GENERAL DESCRIPTION AND FEATURES The TMP8255A (hereinafter referred to as PPI) is a high Speed programmable input/output interface with three 8-bit I/O ports. 24 J/O ports are divided into two groups (Port A and Port B) which are programmable independently by control words provided by MPU. The PPI has three operation modes (Mode 0, 1 and 2) and is capable of versatile interface between MPU and peripheral devices. (1) 5V+5% Single power supply (2) 24 programmable I/O ports (3) Three operation modes (Mode 0, Mode 1, Mode 2) (4) Bit set/reset capability 2. PIN CONNECTIONS (TOP VIEW) PA30 1 ~ 40 DPAg PA2T 2 39 2 PAs PA, 03 38 D PAg PAg U4 37 D2 PAz RDQ5 36 DWR cso6 35 D RESET (GND) Vss 07 34 Do AiZ8 33 DD, Aol 9 32 DD2 PC70 10 31 D3 Ped 11 30 [D4 PCs 12 29 Ds PCa J 13 28 Dg PCo A 14 27 DD, Pc, 415 26 DP Vcc (+5V) PC2 0 16 25 0 PB7 Pc30 17 24 0 PBe PBoT 18 23 PBs PB,Q 19 22 OPBa PB2 J 20 21 DPB3 TMP8255AP-5 MPU85-128TOSHIBA 3. BLOCK DIAGRAM asa AY RESET TMP8255A D7~Do BIDIR
INE PACKAGE SSOP40-P-450 Unit: mm 40 IIAADSAABAADRIONBEL ) Vi HEEL WVEHEA ETE | : VISTYP | 0.35401 [U.iSTYP [0.8] f@f{o.16@ | W7502 4 . 0.2 -0-05 a i 40-1 15 0.1940.1]}2.44: 2 BMAX 0.840.2 270289 MPU85-152TOSHIBA TMP8255A PROGRAMMABLE PERIPHERAL INTERFACE TMP8255AP-5 1. GENERAL DESCRIPTION AND FEATURES The TMP8255A (hereinafter referred to as PPI) is a high Speed programmable input/output interface with three 8-bit I/O ports. 24 I/O ports are divided into two groups (Port A and Port B) which are programmable independently by control words provided by MPU. The PPI has three operation modes (Mode 0, 1 and 2) and is capable of versatile interface between MPU and peripheral devices. (1) 5V+5% Single power supply (2) 24 programmable I/O ports (3) Three operation modes (Mode 0, Mode 1, Mode 2) (4) Bit set/reset capability 2. PIN CONNECTIONS {TOP VIEW) PA3q1 ~~ 40 DPAg PA2 0 2 39 NPAs PA, 03 38 1 PAs PAg I 4 37 9 PA? RDS 36 ) WR csd6 35 0 RESET (GND) Vss 7 34 Dp Ai08 33 0D, Ao d9 32 1 D2 PC70 10 31 D3 P
it :mm frre oom) pr rr rrr rr 44 ;IT 4 a fo soo) fry fIT rrr fr por) rrr rrr | (450mi 1) we TRH BH EHR HATER | 1.15TYP ligase [1.15TYP +01 . -0-05 0. totoafo.as 0.2 ' | [2 sax 0.15 0.840.2 270289 MPU85-152TOSHIBA TMP8255A PROGRAMMABLE PERIPHERAL INTERFACE TMP8255AP-5 1. GENERAL DESCRIPTION AND FEATURES The TMP8255A (hereinafter referred to as PPI) is a high Speed programmable input/output interface with three 8-bit I/O ports. 24 I/O ports are divided into two groups (Port A and Port B) which are programmable independently by control words provided by MPU. The PPI has three operation modes (Mode 0, 1 and 2) and is capable of versatile interface between MPU and peripheral devices. (1) 5V+5% Single power supply (2) 24 programmable I/O ports (3) Three operation modes (Mode 0, Mode 1, Mode 2) (4) Bit set/reset capability 2. PIN CONNECTIONS (TOP VIEW) Pasd1 ~~ 40 bPag PA2Q 2 39 PAs PA, 03 38 [1 PAg PAgt4 37 DPA? RDS 36 WR csa6 35 ND RESET (GND) Vss 07 34 Do Ai 8 33 1D, Aol 32 1D2 Pc7 7 10 31 0 D3 PCg 0