Package 74HC574D-Q100 Temperature range Name Description Version 40 C to +125 C SO20 plastic small outline package; 20 leads; body width 7.5 mm SOT163-1 40 C to +125 C TSSOP20 plastic thin shrink small outline package; 20 leads; body width 4.4 mm SOT360-1 74HCT574D-Q100 74HC574PW-Q100 74HCT574PW-Q100 4. Functional diagram ' 4 ' 4 ' ' ' ' 4 ' 4 ' 4 4 )) WR )) 4 67$7( 2873876 4 &3 2( PQD Fig 1. Functional diagram ' ' ' 4 ' ' &3 4 ' &3 )) ' 4 ' &3 )) ' 4 ' &3 )) ' 4 ' ' &3 )) 4 ' &3 )) ' 4 ' &3 )) 4 &3 )) )) &3 2( 4 4 4 4 4 4 4 4 DDK Fig 2. Logic diagram 74HC_HCT574_Q100 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 2 -- 26 January 2015 (c) NXP Semiconductors N.V. 2015. All rights reserved. 2 of 17 74HC574-Q100; 74HCT574-Q100 NXP Semiconductors Octal D-type flip-flop; positive edge-trigger; 3-state & (1 &3 ' 4 ' 4 ' 4 ' 4 ' 4 ' 4 ' 4 ' 4 2( Fig 3. ' PQD PQD Logic symbol Fig 4. IEC logic symbol 5. Pinning information 5.1 Pinning +&4 +&74 2( 9&& ' 4

Package 74HC574D-Q100 Temperature range Name Description Version 40 C to +125 C SO20 plastic small outline package; 20 leads; body width 7.5 mm SOT163-1 40 C to +125 C TSSOP20 plastic thin shrink small outline package; 20 leads; body width 4.4 mm SOT360-1 74HCT574D-Q100 74HC574PW-Q100 74HCT574PW-Q100 4. Functional diagram 2 D0 Q0 19 3 D1 Q1 18 4 D2 5 D3 6 D4 7 D5 Q5 14 8 D6 Q6 13 9 D7 Q7 12 Q2 17 FF1 to FF8 Q3 16 3-STATE OUTPUTS Q4 15 11 CP 1 OE mna800 Fig 1. Functional diagram D0 D1 D Q D2 D CP Q D CP FF1 D3 Q D CP FF2 D4 Q D CP FF3 D5 Q D CP FF4 D6 Q D CP FF5 D7 Q D CP FF6 Q CP FF7 FF8 CP OE Q0 Q1 Q2 Q3 Q4 Q5 Q6 Q7 001aah077 Fig 2. Logic diagram 74HC_HCT574_Q100 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 1 -- 2 August 2012 (c) NXP B.V. 2012. All rights reserved. 2 of 17 74HC574-Q100; 74HCT574-Q100 NXP Semiconductors Octal D-type flip-flop; positive edge-trigger; 3-state 11 1 C1 EN 11 2 CP 2 3 4 5 6 D0 Q0 D1 Q1 D2 Q2 D3 Q3 D4 7 8 9 Q4 D5 Q5

Package 74HC574D-Q100 Temperature range Name Description Version 40 C to +125 C SO20 plastic small outline package; 20 leads; body width 7.5 mm SOT163-1 40 C to +125 C TSSOP20 plastic thin shrink small outline package; 20 leads; body width 4.4 mm SOT360-1 74HCT574D-Q100 74HC574PW-Q100 74HCT574PW-Q100 4. Functional diagram ' 4 ' 4 ' ' ' ' 4 ' 4 ' 4 4 )) WR )) 4 67$7( 2873876 4 &3 2( PQD Fig 1. Functional diagram ' ' ' 4 ' ' &3 4 ' &3 )) ' 4 ' &3 )) ' 4 ' &3 )) ' 4 ' ' &3 )) 4 ' &3 )) ' 4 ' &3 )) 4 &3 )) )) &3 2( 4 4 4 4 4 4 4 4 DDK Fig 2. Logic diagram 74HC_HCT574_Q100 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 2 -- 26 January 2015 (c) NXP Semiconductors N.V. 2015. All rights reserved. 2 of 17 74HC574-Q100; 74HCT574-Q100 NXP Semiconductors Octal D-type flip-flop; positive edge-trigger; 3-state & (1 &3 ' 4 ' 4 ' 4 ' 4 ' 4 ' 4 ' 4 ' 4 2( Fig 3. ' PQD PQD Logic symbol Fig 4. IEC logic symbol 5. Pinning information 5.1 Pinning +&4 +&74 2( 9&& ' 4

Package 74HC574D-Q100 Temperature range Name Description Version 40 C to +125 C SO20 plastic small outline package; 20 leads; body width 7.5 mm SOT163-1 40 C to +125 C TSSOP20 plastic thin shrink small outline package; 20 leads; body width 4.4 mm SOT360-1 74HCT574D-Q100 74HC574PW-Q100 74HCT574PW-Q100 4. Functional diagram ' 4 ' 4 ' ' ' ' 4 ' 4 ' 4 4 )) WR )) 4 67$7( 2873876 4 &3 2( PQD Fig 1. Functional diagram ' ' ' 4 ' ' &3 4 ' &3 )) ' 4 ' &3 )) ' 4 ' &3 )) ' 4 ' ' &3 )) 4 ' &3 )) ' 4 ' &3 )) 4 &3 )) )) &3 2( 4 4 4 4 4 4 4 4 DDK Fig 2. Logic diagram 74HC_HCT574_Q100 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 2 -- 26 January 2015 (c) Nexperia B.V. 2017. All rights reserved 2 of 17 74HC574-Q100; 74HCT574-Q100 Nexperia Octal D-type flip-flop; positive edge-trigger; 3-state & (1 &3 ' 4 ' 4 ' 4 ' 4 ' 4 ' 4 ' 4 ' 4 2( Fig 3. ' PQD PQD Logic symbol Fig 4. IEC logic symbol 5. Pinning information 5.1 Pinning +&4 +&74 2( 9&& ' 4 ' 4 ' 4 ' 4 ' 4 +&4