conditions, the regulator/resistor configuration results in an 7.5% (1.129/15) worst case output voltage error. VOUT = 1.18 + VZ HIP5600 VIN REF LINEREG Example: Given: VIN = 200V, VOUT = 14.18V (VREF = 1.18V, VZ = 13V), VZ = 5%, VZTC = +0.079%/C (assumes 1N5243BPH), IOUT equal 10mA and Temp equal +60oC. The worst case VOUT is 0.4956V. The shift in VOUT is attributed to the following: -0.2 (HIP5600) and 0.69 (zener diode). Regulator With Zener VOUT ) ( I OUT V IN ) + V Equations 4(A,B,C) are provided to determine the worst case output voltage in relation to; manufacturing tolerances of HIP5600 and the zener diode (VREF and Vz), load regulation of the HIP5600 (VREF LOAD REG), and the effects of temperature on the HIP5600 and the zener diode (VREFTC, VZTC). FIGURE 2. ADJ SA ( I OUT ) + V REF TC ( Temp ) V T Z V Z tolerance ( V Z ) + V Z TC ( Temp ) AC/DC IADJ TC ( LOADREG VOUT RF2 VREF REF (EQ. 4A) AC/DC I1 RF1 VOUT VZ VOUT VZ 3.7V 2.5V 5.1V 3.9V 10.3V 9.1V 12.2V 11V 16.2V 15V External Capacitors A

de (AVp_r and AV,), load reg- ulation of the HIP5600 (VREF LOAD REG), and the effects of temperature on the HIP5600 and the zener diode (VpEFTC, VzTC). Example: Given: Viy = 200V, VouT = 14.18V (VREF = 1.18V, Vz = 13V), AVz = 5%, V7TC = +0.079%/C (assumes 1N5243BPH), Algyt equal 10mA and ATemp equal +60C. The worst case AVoytT is 0.4956V. The shift in Vout is attributed to the following: -0.2 (HIP5600) and 0.69 (zener diode). The regulator/zener diode configuration gives a 3.5% (0.49/14.18) worst case output voltage error where, for the same conditions, the regulator/resistor configuration results in an 7.5% (1.129/15) worst case output voltage error. External Capacitors A minimum10uF output capacitor (C2) is required for stability of the output stage. Any increase of the load capacitance greater than 10uF will merely improve the loop stability and output impedance. A 0.02uUF input decoupling capacitor (C1) between Vj, and ground may be required if the power source impedance is not sufficiently l

diode (VREF and Vz), load regulation of the HIP5600 (VREF LOAD REG), and the effects of temperature on the HIP5600 and the zener diode (VREFTC, VZTC). Example: Given: VIN = 200V, V OUT = 14.18V (VREF = 1.18V, VZ = 13V), VZ = 5%, VZTC = +0.079%/ C (assumes 1N5243BPH), IOUT equal 10mA and Temp equal +60 oC. The worst case VOUT is 0.4956V. The shift in VOUT is attributed to the following: -0.2 (HIP5600) and 0.69 (zener diode). The regulator/zener diode configuration gives a 3.5% (0.49/14.18) worst case output voltage error where, for the same conditions, the regulator/resistor configuration results in an 7.5% (1.129/15) worst case output voltage error. External Capacitors IADJ An optional bypass capacitor (C3) from VADJ to ground improves the ripple rejection by preventing the ripple at the Adjust pin from being amplified. Bypass capacitors larger than 10F do not appreciably improve the ripple rejection of the part (see Figure 20 through Figure 25). VREF I1 RF1 VOUT IADJ AC/DC (B) FIGURE 4. VOUT RF2

when driven by a power source with a high impedance for the 1MHz 10MHz band. AC/DC RS D1 PROTECTS AGAINST C3 DISCHARGING WHEN THE OUTPUT IS SHORTED. VIN Example: Given: VIN = 200V, VOUT = 14.18V (VREF = 1.18V, VZ = 13V), VZ = 5%, VZTC = +0.079%/C (assumes 1N5243BPH), IOUT equal 10mA and Temp equal +60oC. The worst case VOUT is 0.4956V. The shift in VOUT is attributed to the following: -0.2 (HIP5600) and 0.69 (zener diode). IADJ VOUT of HIP5600 and the zener diode (VREF and Vz), load regulation of the HIP5600 (VREF LOAD REG), and the effects of temperature on the HIP5600 and the zener diode (VREFTC, VZTC). VIN RS (EQ. 4B) VREF V T Z V Z tolerance ( V Z ) + V Z TC ( Temp ) ADJ ( I OUT ) + V REF TC ( Temp ) VOUT LOADREG AC/DC VIN V REF + V REF VOUT REF ADJ V T HIP5600 (EQ. 4A) + VOUT RF1 C3 10F D1 C2 10F RF2 FIGURE 5. REGULATOR WITH PROTECTION DIODE Load Regulation Selecting the Right Heat Sink For improved load regulation, resistor RF1 (connected between the adjustment terminal and VOUT) should be