XC5202-3PG156I User Programmable Gate Array
From Xilinx, Inc.
| @IOH (test) | 8m |
| @Iol (A) | 8m |
| Configurable Logic Blocks | 64 |
| Digital Input V Max (V) | 7 |
| Gate Capacity | 3000 |
| Logic Level Family | CMOS and T |
| Maximum Toggle Rate | 83M |
| Military | N |
| Number of User I/Os | 84 |
| Package | PGA |
| Package Body Material | Ceramic |
| Pins | 156 |
| Program Data (Bits) | 42416 |
| Quiescent Current Max (CMOS) | 15m |
| Quiescent Current Max (TTL) | 15m |
| Technology | CMOS |
| V(OH)Min.(V)Hi Level Out.Volt. | 3.86 |
| V(OL)Max.(V)Lo Level Out.Volt. | .4 |
| VIH Min. (CMOS) (V) | 3.5 |
| VIH Min. (TTL) (V) | 2.0 |
| VIL Max. (CMOS) (V) | 1 |
| VIL Max. (TTL) (V) | .8 |
| Vsup (+) Maximum (V) | 7 |
| Vsup(+) Nom.(V) Pos.Sup.Volt. | 5 |
