AM280251E
256 to 500 Bit Shift Register

From Advanced Micro Devices

StatusDiscontinued
Bits Per Reg.256
Data Inp ModeParallel
Data Outp ModeParallel
MilitaryN
Mode Dyn/ StatDynamic
No. of Reg.4
P(D) Max.(W) Power Dissipation250m›
PackageDIP
Pins14
TechnologyPMOS
Vsup Nom.(V) Supply Voltage5.0
f(oper) Max. (Hz)10M
t(PLH) Maximum (S)90n

External links