EP1810GC-35 CPLD Classic Family 900 Gates 48 Macro Cells 28.6MHz 5V 68-Pin CPGA
From ALTERA
| # I/Os (Max) | 64 |
| # Macrocells | 48 |
| Family Name | Classic |
| Frequency | 41.67 MHz |
| Frequency (Max) | 41.67 MHz |
| In System Programmable | No |
| Memory Type | EPROM |
| Mounting | Through Hole |
| Number of Usable Gates | 900 |
| Operating Supply Voltage (Max) | 5.25 V |
| Operating Supply Voltage (Min) | 4.75 V |
| Operating Supply Voltage (Typ) | 5 V |
| Operating Temp Range | 0C to 70C |
| Operating Temperature (Max) | 70C |
| Operating Temperature (Min) | 0C |
| Operating Temperature Classification | Commercial |
| Package Type | CPGA |
| Pin Count | 68 |
| Programmable | Yes |
| Propagation Delay Time | 35 ns |
| Rad Hardened | No |
